Several Digital IP cores are available and are optimized for high performance and low power such as IoT security algorithms, several communication standards blocks, NoC routers and interfaces, and NoC-based FPGA. These IPs are available either soft (HDL code), generic, or hard (gds2) formats.
The NNIPLPIOTACORN100 soft IP is intended to be used in Xilinx FPGA kits as an RTL optimized code. In addition, it is available as a hard ASIC IP which can be cost-effectively ported across process nodes and technology foundries. The hard ASIC IP provides up to 100Mbps throughput with power consumption of 100μmW and very […]
The NNIPREIOTRISCV50 soft IP is intended to be used in Xilinx FPGA kits as an RTL optimized code. In addition, it is available as a hard ASIC IP which can be cost-effectively ported across process nodes and technology foundries. The hard ASIC IP provides up to 50Mbps throughput with power consumption of 20μW and very […]