NNIPREIOTRISCV50: Biomedical Reconfigurable Co-Processor

The NNIPREIOTRISCV50 soft IP is intended to be used in Xilinx FPGA kits as an RTL optimized code. In addition, it is available as a hard ASIC IP which can be cost-effectively ported across process nodes and technology foundries. The hard ASIC IP provides up to 50Mbps throughput with power consumption of 20μW and very small Silicon area.